1. Field of the Invention
The present invention is related to a method for disposing power planes and ground planes of printed circuit board, and more particularly, to a method of first segmenting the geometric layout into smallest closed region and then determining whether via hole on the printed circuit board is located in the smallest closed region.
2. Description of Related Art
Generally speaking, printed circuit boards are provided for electric components fixation and mechanical support, and for forming electric connection between electric components at the same time. Printed circuit boards are composed of insulation layer and conduction layer. The insulation layer is usually dielectric material that provides electric insulation between conduction layers. The conduction layer is patterned to form wiring to be used in the electric connection between electric components on the circuit board.
In order to increase the function of printed circuit board, multi-layer board is widely used to form a printed circuit board in order to facilitate the design and layout of circuit and electrical property. For example, the first layer of multi-layer printed circuit board is designed as layout region of the first power plane (such as: 3V DC); the second layer of multi-layer printed circuit board is designed as layout region of ground plane of the whole printed circuit board; and the third layer of multi-layer printed circuit board is designed as layout region of the second power plane (such as: 5V DC). When the three layers are assembled and processed with appropriate hole drilling and electroplating, a multi-layer printed circuit board with different power disposition is completed. Although it is easy to manufacture this kind of printed circuit board, yet the manufacturing process is too complex and the thickness and also production cost of multi-layer printed circuit board cannot be effectively reduced.
With the trend of light, thin, short, and small and the multi-function integrated development of electric products, 3C products for example, the printed circuit board also needs to provide different power supplies to different circuits within the smallest and the thinnest area. Therefore, single-layer printed circuit board is used in many products to meet the demand of providing power supply to different circuits. However, in the stage of designing single-layer printed circuit board, the printed circuit board will be segmented into a plurality of power planes with different voltages (for example: 3V plane, 5V plane) and ground planes. At this moment, it is needed in particular to check whether the via hole is located within the correct power plane (or ground plane) to avoid uncertainty when testing. For example, whether each via hole in 3V plane is connected to power supply of 3V and no via hole is connected to power supply of 5V, and vice versa.
When the layout on the printed circuit board becomes more and more concentrated, the via holes also become smaller and increase in number, and the manually performed checking process that checks one via hole after another is no longer cost-effective, and the yield generated cannot be ensured either.
After conducting thorough search and analysis, it is found that most of the prior arts emphasize on how to automatically segment the printed circuit board for forming a plurality of power planes (or ground planes), such as U.S. Pat. No. 7,124,390. What is emphasized in the present invention is a method for automatically checking via holes in power planes (or ground planes).